Ahmed Louri

Ahmed Louri
Title:
David and Marilyn Karlgaard Professor
Office:
SEH 5580 | Office hours: By appointment
Phone:
202-994-8241
Email:
[email protected]
Website:
hpcat.seas.gwu.edu

 

Professor Ahmed Louri was a member of the faculty of the University of Arizona’s Department of Electrical and Computer Engineering from 1988 to 2015. At the University of Arizona, he also was the chair of the computer engineering program from 2000 to 2006 and the director of the High Performance Computing Architectures and Technologies Laboratory. From 2010 to 2013, he served as a program director in the Directorate for Computer and Information Science and Engineering (CISE) of the National Science Foundation.

Professor Louri is the recipient of the National Science Foundation Research Initiation Award (1989), the Best article Award from IEEE Micro, the Advanced Telecommunications Organization of Japan Fellowship, the Centre Nationale de Recherche Scientifique (CNRS), France, Fellowship, and the Japan Society for the Promotion of Science Fellowship, and several teaching awards. He was instrumental in bringing optical interconnects into mainstream research in interconnection networks and bridging the gap between computer architecture and optics research communities.

Professor Louri is a Fellow of IEEE, a regular member of OSA, a member of the International Society for Optical Engineering working Group on Optical Computing, a member of the IEEE Society Technical Committee on Computer Architecture, and a member of the IEEE Technical Committee on Parallel Processing.

Professor Louri’s primary research interests include computer architecture, parallel and distributed computing, interconnection networks, optical interconnects for parallel computing systems, reconfigurable computing systems, scalable and power-efficient architectures, fault-tolerant multiprocessors, network on chips (NoCs) for multi-core and many-core architectures, fault-tolerant and self-healing NoCs, emerging interconnect technologies (photonic, wireless, RF, hybrid) for multi-core architectures and chip multiprocessors (CMPs), embedded and SoC systems. He has published more than 125 journal articles and conference papers in these areas, and holds several U.S. patents. His research has been sponsored by NSF, DOE, AFOSR, and a number of industrial organizations. 

 

  • Ph.D. 1988, University of Southern California

  • Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures
    Dominic DiTomaso, Avinash Kodi, Ahmed Louri and Razvan Bunescu
    IEEE Transactions on Computers, vol. 64, no. 12, pp. 3555-3568, December 2015.

  • Shield: A Reliable Network-on-Chip Router Architecture for Chip Multiprocessors
    Pavan Poluri and Ahmed Louri
    Accepted to appear IEEE Transactions on Parallel and Distributed Systems, 2016

  • A Methodology for Cognitive NoC Design
    Wo-Tak Wu and Ahmed Louri
    IEEE Computer Architecture Letters,issue 99, June 2015.

  • Evaluating Soft Error Tolerant Techniques in Network on Chip Routers
    Pavan Poluri and Ahmed Louri
    Under Review, IEEE Embedded Systems Letters October 2014

  • Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures
    Dominic DiTomaso, Avinash Kodi and Ahmed Louri
    Accepted to appear in IEEE Transactions on Computers, 2015.

  • A Soft Error Tolerant Network-on-Chip Router Pipeline for Multi-core Systems
    Pavan Poluri and Ahmed Louri
    Accepted to appear in IEEE Computer Architecture Letters 2014.

  • Three-Dimensional Stacked Nanophotonic Network-on-Chip Architecture with Minimal Reconfiguration
    Randy Morris, Avinash Kodi, Ahmed Louri and Ralph Whaley
    IEEE Transactions on Computers, vol. 63, issue 1, pp. 243-255, Jan. 2014

  • Workload Assignment Considering NBTI Degradation in Multi-core Systems 
    Jin Sun, Roman Lysecky, Karthik Shankar, Avinash Kodi, Ahmed Louri and Janet Roveda
    ACM Journal of Emerging Technologies in Computing Systems, vol. 10, no. 1, Article 4, pp. 1-22, Jan. 2014

  • Extending the Energy Efficiency and Performance with Channel Buffers, Crossbars and Topology Analysis for Network-on-Chips 
    Dominic DiTomaso, Randy Morris, Avinash Kodi, Ashwini Sarathy and Ahmed Louri
    IEEE Transactions on VLSI, vol. 21, no. 11, pp. 2141-2154, November 2013

  • Introduction to the Special Issue on Network-on-Chips (NoCs)
    Ahmed Louri and Avinash Karanth Kodi
    Journal of Parallel and Distributed Computing vol. 71, issue 5, pp. 623-624, May 2011

  • Multi-dimensional and Reconfigurable Optical Interconnects for High-Performance Computing (HPC) Systems
    Avinash Karanth Kodi and Ahmed Louri
    IEEE Journal of Lightwave Technology, vol. 27, no. 21, pp. 4634-4641, November 2009

  • Reconfigurable and adaptive photonic networks for high-performance computing systems
    Avinash Karanth Kodi and Ahmed Louri
    OSA Applied Optics,Special Issue on Optical High-Performance Computing, vol. 48, no. 22, pp. E13-E23, August 2009

  • Adaptive Channel Buffers in On-chip Interconnection Networks - A Power and Performance Analysis
    Avinash Karanth Kodi, Ashwini Sarathy and Ahmed Louri
    IEEE Transactions on Computers, Special Section on Networks-on-Chip, vol. 57, no. 9, pp. 1169-1181, September 2008.

  • Low-power low-area network-onchip architecture using adaptive electronic link buffers
    Ashwini Sarathy, Avinash Karanth Kodi and Ahmed Louri
    Electronics Letters, vol. 44, no. 8, pp. 512-513, April 10, 2008.

  • OPTISIM: A System Simulation Methodology for Optically Interconnected HPC Systems
    Avinash Karanth Kodi and Ahmed Louri
    IEEE Micro, vol. 28, no. 5, pp. 22-36 (Sept/Oct 2008).

  • System simulation methodology of optical interconnects for high-performance computing systems
    Avinash Karanth Kodi and Ahmed Louri
    OSA Journal of Optical Networking (JON), vol. 6, no. 12, pp. 1282-1300, December 2007.

  • Proposed Low-Power High-Speed Microring Resonator-Based Switching Technique for Dynamically Reconfigurable Optical Interconnects 
    Chander Kochar, Avinash Karanth Kodi and Ahmed Louri
    IEEE Photonics Technology Letters, vol. 19, no. 17, pp. 1304-1306, September 2007.

  • nD-RAPID: a multidimensional scalable fault-tolerant optoelectronic interconnection for high-performance computing systems
    Chander Kochar, Avinash Karanth Kodi and Ahmed Louri
    Journal of Optical Networking, Special Issue on Switching in Photonics, vol.6, no. 5, pp. 465-481, May 2007.

  • RAPID for high-performance computing systems: architecture and performance evaluation
    Avinash Karanth Kodi and Ahmed Louri
    Applied Optics, Special Issue on Information Photonics, vol. 45, no. 25, pp. 6326-6334, September 2006.

  • Design of a High-Speed Optical Interconnect for Scalable Shared-Memory Multiprocessors
    Avinash Karanth Kodi and Ahmed Louri
    IEEE Micro, Special Issue on Hot Interconnects 12, vol. 25, no. 1, pp. 41-49, Jan/Feb 2005.

  • An Optical Interconnection Network and a Modified Snooping Protocol for the Design of Large-Scale Symmetric Multiprocessors (SMPs)
    Ahmed Louri and Avinash Karanth Kodi
    IEEE Transactions on Parallel and Distributed Systems , vol. 15, no.12, pp. 1093-1104, December 2004.

  • RAPID: Reconfigurable and Scalable All-Photonic Interconnect for Distributed Shared Memory Multiprocessors
    Avinash Karanth Kodi and Ahmed Louri
    IEEE/OSA Journal of Lightwave Technology, Special Issue on Optical Interconnects , vol. 22, no. 9, pp. 2101-2110, September 2004.

  • An Optically Assisted High Speed Scalable IP Router
    Ramana Bhagavatula and Ahmed Louri
    IEEE Optical Communications , 2004.

  • Fellow of the IEEE
  • Associate Editor, IEEE Transactions on Computers
  • Associate Editor, IEEE Transactions on Emerging Topics in Computing
  • Steering Committee Member and Associate Editor, IEEE Transactions on Sustainable Computing